Flash筆記 Manual

• STM32F407

• 這塊板子是NAND Flash或是NOR Flash?
• 板子詳細資料STM32F4
• STM32F407VGT6解析
• Device family:STM32 = ARM-based 32-bit microcontroller
• Product type:F = general-purpose
• Device subfamily:407= STM32F40x, connectivity, camera interface, Ethernet
• Pin count:V = 100 pins
• Flash memory size:G = 1024 Kbytes of Flash memory
• Package:T = LQFP
• Temperature range:6 = Industrial temperature range, –40 to 85 °C.
• P.19
• Core: ARM 32-bit Cortex™-M4 CPU with FPU,Adaptive real-time accelerator (ART
  Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz,memory protection unit, 210 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• Memories
  – Up to 1 Mbyte of Flash memory
  – Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory)  data RAM
  – Flexible static memory controller supporting Compact Flash, SRAM,
  PSRAM, NOR and NAND memories
• The STM32F405xx and STM32F407xx family incorporates high-speed embedded
  memories (Flash memory up to 1 Mbyte, up to 192 Kbytes of SRAM), up to 4 Kbytes of backup SRAM, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.
• FSMC memory controller:YES
• For the LQFP100 and WLCSP90 packages, only FSMC Bank1 or Bank2 are available. Bank1 can only support a multiplexed NOR/PSRAM memory using the NE1 Chip Select. Bank2 can only support a 16- or 8-bit NAND Flash memory using the NCE2 Chip Select. The interrupt line cannot be used since Port G is not available in this package.
• AHB:AMBA High-performance Bus, internal bus for microcontrollers
•  FSMC介紹:P.22
• Boot modes:
• At startup, boot pins are used to select one out of three boot options:
  • Boot from user Flash
  • Boot from system memory
  • Boot from embedded SRAM
• The boot loader is located in system memory. It is used to reprogram the Flash memory by using USART1 (PA9/PA10), USART3 (PC10/PC11 or PB10/PB11), CAN2 (PB5/PB13), USB OTG FS in Device mode (PA11/PA12) through DFU (device firmware upgrade).
• STM32F40x memory map(P.69)
• Flash:0x0800 0000 - 0x080F FFFF
• Flash interface register(p.71)
• Maximum Flash memory access frequency with no wait state(p.79)
• 
   
• 關於fHCLK和fPCLK的計算和描述，可以看Manual Reference in P.82
• Differences between ART accelerator enabled and disabled
• FLASH_ACR
• Manual in P.83.84
• Reference:How to enable ART accelerator STM32F407VGT6
• ART accelerator ON or OFF versus peripherals ON or OFF:P.85.86
• Flash mode versus IDD_STOP:P.88
• P.93
• Flash memory characteristics:P.104
• Flash Memory Programming:P105.106
• Switching characteristics for NAND Flash read cycles:P.154.155
• data latency